Comparison of Aliasing Probabilit for Multiple MlSRs and M-stage MlSRs wit i m Inputs

Kazuhiko Iwasaki, Shou-Ping Feng, Tom Fujiwara, Tadao Kasami · 1991

MISRs are widely used as signature circuits for VLSI built-in self-tests. To improve the aliasing probability of MISRs, multiple MISRs and M-stage MISRs with m inputs are available, where M is greater than m. The aliasing probability as a function of the test length for these si nature circuits is anal zed for a binary symmetric channi. It is shown that de peak aliasing probability of the double MISRs is less than that of an M- stage MISR with m inputs. It is also shown that the final aliasing probability for a multiple MISR with d MISRs is 2-& and that for an M-stage MISR with m inputs is 2-M if it is characterized by a primitive polynomial. The double MISR is recommended to reduce the aliasing probability of signature circuits. I ntroductlo n The built-in self-test (BIST) is a promising technique for VLSI testing (l), 21. Test vectors for a circuit under test (CUT) are usually generated by a pseudo-random pattern generator VRPG). The test response sequence is compacted by a signature circuit. The calculated signature is compared with the fault-free signature. If the compacted signature is equal to the fault-free one, the CUT is considered fault-free. Otherwise, it is considered faulty. Linear feedback shift registers (LFSRs), multiple input signature registers (MISRs), and multiple MISRs are used as compaction circuits. The BIST technique has many advantages in comparison with conventional testing techniques (2). However, one of the drawbacks of the BIST is the aliasing m. That is, a series of erroneous test responses happens to generate the fault-free signature. This means that a faulty CUT is considered fault-free by mistake. Therefore, the analysis of the aliasing probability for signature circuits is very important. In addition, techniques to decrease the aliasing probability are required. The aliasing probability of LFSRs has been analyzed for a binary symmetric channel (BSC) (4) - (12), as well as for other error models 151, 161, 1131. In 161 - (81, it is shown that the aliasing probability for the LFSR characterized by G(x) is equal to the probability of an undetected emr for the cyclic code generated by G(x). For MISRs with m inputs, it is shown that the series of test reyes that causes an aliasing error is equal to a code wor in a maximum-distance-separable (MDS) code with a distance of two over GF(2) (14). GF(2) represents a Galois field with 2 elements. The aliasing probability of MISRs for the 2-ary symmetric channel is derived using the weight distribution of the MDS code (14), (15). The aliasing probability of MISRs for the BSC is analyzed by applying the binary weight

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