High-Speed Bus Architecture and Data Transmission Technology Overview
Xu Jiang · 2001
ed I/O is a collection of systems networked to form a high availability system. It utilizes software message passing and RDMA, has low OS dependence (application latency) and security, and is typically applicable over moderate distances below 30m. High-Speed Bus Architecture and Data Transmission Technology Overview Prepared by eSilicon Corporation, Copyright July 2001 Page 3 of 29 Example technologies are proprietary SAN Interconnects, Fiber Channel, SCSI, and InfiniBand. Fully Abstracted I/O is a collection of systems to allow resource sharing. It utilizes message passing and is fully secure. The transactions use full OS capability, and they can be used over long distances greater than 100m. Example technologies are 10/100 Ethernet and Gigabit Ethernet. Traditional Interconnect Architecture The traditional interconnect architecture between microprocessors and peripherals is a hierarchy of shared busses. Devices are placed at the appropriate level in the hierarchy according to the performance level they require. Low performance devices are placed on lower performance busses, which are bridged to the higher performance busses so as not to burden higher performance devices. Bridging is also done to address legacy interfaces. Fig. 2 shows the traditional interconnect architecture. Processor Bus Local I/O Bus Backplane System Area Network Local Area Network Proprietary Busses HyperTransport PCI PCI-X PCI Fabrics Proprietary Interconnects Fiber Channel InfiniBand RapidIO 10 Gbit Ethernet