IMPROVED YIEL,D MODELS FOR FAIJLT-TOL.ERANT RANDOM-ACCESS MEMORY CHIPS
Charles H. Stapper · 1991
Several improvements in the method of yield modeling for mrrnory chips with redundancy are de.wrihed. Firsi, a tfirect method of translating defecimonilor data io memory-chip faults eliminates ihe need for yield-modrl ,formulas, making possihle accurate modeling of ihe faults that can he fixed .viih redundant circuits or other fauli-tolerance techniques. This rr.ru1t.s in Ioosa!~ cotipled distributions instead of the multivariate disirihuiions usad itntil vow for such modeling. Furthermore. ihe yields of array islands with ihair own redundant word and hit lines are combined using a new yield formiila. Examples of the use of this technique .for dymimic random-access t?lPnlI?t‘JJ fDR/i M) chips are given. Finally, a .simpliJied pragmatic approximation technique is discu.rsrd.