Architecture Exploration of Multicore Systems-on-Chip using a TLM-based Framework
Mona Safar, Magdy Ali El-Moursy, Mohamed AbdelSalam, Ashraf Salem · 2013
A framework for TLM architecture exploration of multi-core systems is presented. Starting with a Task Precedence Graph (TPG) as a design entry, different architectures with different number of processor cores, number of busses, task-to-processor and channel-to-bus mappings are automatically generated. The viability and potential of the proposed approach is demonstrated by an illustrative example.