Theory and Practice of Using Models of Concurrency in Hardware Design
Alex Yakovlev · 2005
3 Statement of Originality and Contribution 5 Acknowledgements 6 Summary of Contributions in Submitted Portfolio 8 Introduction 8 1. Formal Models of Asynchronous Behaviour 9 1.1 Signal Transition Graphs 9 1.2 OR-causality and Causal Logic Nets 9 1.3 Models with Relative Timing 10 2. Asynchronous Circuit Design: Methods, Case Studies 10 2.1 Use of theory of regions in design 10 2.2 Design of interfaces using Protocol Machine 11 2.3 Demonstrator Chips 11 3. Asynchronous Circuit Synthesis 11 3.1 Petri net based synthesis methodology 11 3.2 Synthesis methods and algorithms 11 3.3 Synthesis from Hardware Description Languages 12 3.4 Asynchronous behaviour visualisation and interactive synthesis 12 3.5 Synthesis tools 13 4. Asynchronous Circuit Verification and Analysis 13 5. Heterogeneous systems and asynchronous communications 14 6. Metastability, Synchronisers, Arbiters, A/D Converters and Time Measurement Hardware 14 6.1 Metastability 15 6.2 Synchronisers 15 6.3 Arbiters 15 6.4 Analogue to Digital and Time to Digital Converters (Time Measurement) ......16 7. Asynchronous System Fault-tolerance, Testing and Design for Security 16 7.1 Fault-tolerance 16 7.2 Asynchronous Circuit Testing 17 7.3 Secure Circuit Design and Power-Balancing Techniques 18 8. Future work 18 Portfolio of works submitted for Doctor of Science in Engineering 20 Group I (Primary contributions): 20 Group II (Supporting contributions): 22