Hardware Approaches for Transactional Memory
Marc Lupon Navazo · 2008
Transactional Memory is a promising Shared Memory programming model that provides non-blocking synchronization among atomic and isolated transactions. It addresses the programmability issues of lock-based applications using mechanisms that are transparent to developers. Although there are different strategies to implement these mechanisms, only environments with hardware support present better results than solutions based on fine-grain locking. Taking a log-based HTM as a baseline, we present several HTM approaches that improve its transactional mechanisms adding a hardware buffer. Eager Version Management (EVM) and Lazy Version Management (LVM) approaches use the buffer to accelerate abort recovery, whereas Lazy Conflict Detection (LCD) delays the detection of conflicts until commit time. Hybrid Conflict Detection (HCD), a new approach that combines different conflict detection policies, has been proposed to reduce the overhead of previous approaches. A characterization of these approaches with unlimited resources has been made to determine their benefits and weakness. Each HTM approach has been modeled with finite hardware support. Transactions that overflow hardware resources must use software transactional mechanisms, what can generate some inconsistencies among transactions. We propose a system that supports different execution modes to address these problems. We also present a technique to accelerate overflowed transactions using hardware support. The study concludes that HTMs performance depends on the workload and the number of threads used, obtaining huge differences when contention varies. As no approach takes advantage respect to the others, an efficient HTM must support the execution of different HTM approaches.