Design of UART (Universal Asynchronous Receiver Transmitter) using VHDL
Ananya Chakraborty, Sukanya Gupta, Swati Deshkar, Pradeep Kumar Jaisal · 2012
UART- Universal Asynchronous Receiver Transmitter, generally it is used for better transmission of serial data that is it either transmit or receives data serially with the help of shift register. It consist frame format, one start bit (usually low), 5-8 data bit, one optional bit and one stop bit (opposite polarity of start bit). Asynchronous means by using start and stop bit be transmit data, there is no need of sending (PAD) that is ASCII (SYN) for synchronizing transmitter and receiver. It transmit 9600 to 38400 bps for transmitting data bit. Whole process of serial transmission is based upon the principle of shift register. The Universal Asynchronous Receiver Transmitter (UART) is a popular and widely-used device for data communication in the field of telecommunication. There are different versions of UARTs in the industry. (UART) An integrated circuit used for serial communications, containing a transmitter (parallel-to- serial converter) and a receiver (serial-to-parallel converter), each clocked separately. The parallel side of a UART's usually connected to the bus of a computer. When the computer writes a byte to the UART's Transmit Data Register (TDR), the UARTs will start to transmit it on the serial line. The UART's status register contains a flag bit which the computer can read to see if the UART is ready to transmit another byte. Another status register bit says whether the UART has received a byte from the serial line, in which case the computer should read it from the Receive Data Register (RDR). If another byte is received before the previous one is read, the UARTs will signal an overrun via another status bit. The UARTs may be set up to interrupt the computer when data is received or when ready to transmit more data. The UART's serial connections usually go via separate line driver and line receiver integrated circuits which provide the power and voltages required to drive the serial line and give some protection against noise on the line. Data on the serial line is formatted by the UART according to the setting of the UART's control register. This may also determine the transmit and receive rates if the UART contains its own clock circuits or baud rate generators. If incorrectly formatted data is received the UART may signal a framing error or parity error. Often the clock will run at 16