Design and Evaluation of Dual-Mode Processor Architecture
Taichi Maekawa · 2011
Current processor architecture are implemented many techniques and mechanisms including register renaming, scheduling windows, and so on to achieve a high performance using some kinds of parallelisms. However added or modified modules which realize the techniques and mechanisms increase an architecture area and power consumption. The queue processors have been developed to overcome these challenges and generated as a high performance, small area and low power consumption processor. However the queue processors can not execute existed programs which are made by predecessors. Because the queue processors do not have a compatibility with programs made for other processors. At this time, user must make the queue programs from scratch and can not use all existed programs. This thesis presents the 32bits dual execution processor (DEP32) which can execute queue programs and Java byte code without a considerable hardware increase to the base queue processor to reduce a incompatibility of the queue processor The most feature of Java programs is that Java programs use Java byte codes. Since almost Java byte codes are supported by the Java virtual machine except for Java processors, almost Java programs are executed on many processors. And there are many advantages in Java programs, an object-oriented paradigm, a robustness, a security. Thus, Java programs have been used in the internet. Recently Java programs are also used in an embedded systems, because Java programs also have portability. To support Java byte code can reduce a incompatibility of the queue processors. In addition, two computation models of both queue and Java have have many analogies. The DEP32 can overcome a incompatibility of queue processors using a support of the Java computation model without considerable hardware increase to base queue processor. The DEP32 is designed using the Verilog HDL and evaluated by Altera tools. From the design and evaluation results, the DEP32 core which executes both queue and Java computation model increase 7% hardware area and 9% power consumption to the base queue processor. Chapter