FPGA Implementation of Low Power, High Speed, Area Efficient Invisible Image Watermarking Algorithm for Images
Soumya Rasheed, Ece Dept · 2013
In recent years, the applications about multimedia have been developed rapidly. Due to rapid development in the network and communication field, it has become necessary to protect the data during transmission. Digital watermarking is a solution to the copyright protection and authentication of data in the network. Protection of digital multimedia content has become an increasingly important issue for content owners and service providers. So there has been growing interest in developing effective techniques to discourage the unauthorized duplication of digital data In this technique, based Image robust watermarking technique for color and gray scale images was performed. The RGB image is converted to HSV and watermarked by using discrete wavelet transform. Watermarking embedded stage and extraction stage is designed using invisible watermarking algorithm. Here the host signal is an image and after embedding the secret data a watermarked image is obtained and then extracts secret image and original image separately. Checking the watermark insertion and quality analysis various parameters like PSNR, Cross correlation etc FPGA implementation of invisible watermarking algorithm using the proposed design can operate at a maximum frequency of 344 MHz .An improvement of 28% in speed has been achieved by consuming considerably less number of resources of Vertex 6 6vsx315tff1156-2 FPGA device to provide cost effective solutions for real time image processing applications.