An Analog Neural Network Processor with

Bernhard E. Boser, Eduard Säckinger, Jane M. Bromley, Lawrence D. Jackel · 1991

The architecture, implementation, and applications of a special-purpose neural network processor are described. The chip performs over 2000 multiplications and additions simultaneously. Its data path is particularly suitable for the convolutional topologies that are typical in classification net- works, but can also be configured for fully connected or feed- back topologies. Resources can be multiplexed to permit imple- mentation of networks with several hundreds of thousands of connections on a single chip. Computations are performed with 6-b accuracy for the weights and 3 h for the neuron states. Analog processing is used internally for reduced power dissipa- tion and higher density, but all input/output is digital to simplify system integration. The practicality of the chip is demonstrated with an implementation of a neural network for optical character recognition. This network contains over 130000 connections and is evaluated in 1 ms.

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