FPGA Implementation of a Self Healing Strategy for Interconnect Faults in Digital Measurement Circuits
Sangavi Meyyappan, V. Alamelumangai · 2013
The paper attempts to evolve a design mechanism with a view to address the predictive occurrence of interconnect faults in digital measurements acquired through combinational circuits. The system inherits a facility to analyse the flow of signal at all intermediate levels to ensure the comprehensive fault tolerant status. The procedure avails the role of a standard decoder circuit to explore the strength of the methodology and establish its feasibility in a FPGA environment. The generation of test patterns skim the nuances of the existing schemes to arrive at the timing diagrams to suit both stuck at zero and stuck at one faults. The methodology attaches a self healing nature and ventures to carry through the signal in accordance with the attributes of specific application requirements. The FPGA based experimental results obtained validate the simulation exercises in the Modelsim platform and reopen a paradigm shift in the scope of digital circuits.