Space Efficient Division on FPGAs
Donald G. Bailey · 2006
Division algorithms are discussed in the context of implementing image processing algorithms on FPGAs. The speed requirements of image processing are modest, but throughput is important, with one division having to be completed per clock cycle. Several division algorithms are compared, with the non-restoring algorithms being both the smallest and fastest of the basic methods. If necessary, the algorithms may be easily pipelined to meet the throughput requirements.