BIST/TEST-DECOMPRESSOR DESIGN USING COMBINATIONAL TEST SPECTRUM
Nitin Yogi, Vishwani D. Agrawal · 2009
ATPG vectors for a combinational circuit exhibit correlations among the bits of a test vector. We propose a BIST/decompressor circuit design methodology using spectral methods which utilizes the correlation information. This circuit serves dual purposes. It generates BIST vectors that are similar to the ATPG vectors with higher test coverage as compared to random and weighted random vectors. The same circuit can also function as a test data decompressor for compressed ATPG vectors applied from an external tester. The proposed design method consists of spectral analysis of ATPG vectors to determine prominent spectral components and a vector shuffling algorithm to minimize noise. A BIST/decompressor circuit is then constructed using the spectral information and the noise level. For ISCAS’85 circuit c7552 and the combinational part of ISCAS’89 circuit s15850 we compare the new methodology against ATPG, and random or weighted random BIST vectors with respect to test coverage, test data volume, test application time and area overhead. For test application time, we assume that the on-chip system clock is ten times faster than the external tester clock. For c7552, the pure BIST mode achieves test coverage of about 99.25 % with zero external test data volume in the same test time as that for external application of ATPG vectors having 100 % coverage. Using the decompressor mode, when compressed ATPG vectors are applied from an external tester, we achieve 100 % coverage with test data compressed to around 5%. In a hybrid mode, where some compressed external ATPG vectors serve as seeds for BIST, we again achieve 100 % test coverage with test data volume reduced to around 1.5%, in comparison to external ATPG test vectors. The area overhead of the proposed BIST/decompressor circuit is similar to that of random and weighted random pattern BIST.