A LOW POWER COUNTERMEASURE CIRCUIT FOR HIGHLY SECURE AES ALGORITHM AGAINST DPA ATTACK
Preshy Np · 2014
The differential power analysis (DPA) has become a big threat to crypto chips since it can efficiently disclose the secret key without much effort. Several methods have been proposed in literatures to resist the DPA attack, but they largely increase the hardware cost and severely degrade the throughput. In this brief, a security problem based on ring oscillators is resolved by a new architecture with self$generated true random sequence. The true rando m$based architecture is implemented with an Advance d Encryption Standard (AES) crypto engine. But the power overhead is high. To reduce this power overhead Bit Swapping LFSRs was introduced in the True Random Based Architecture. The proposed Low Power DPA countermeasure circuit reduces the power consumption upto 75% without throughput degradation. Keywords: Advanced Encryption Standard (AES), cryptography, differential power analysis (DPA), ring oscillators, true random number generator, Bit Swapping LFSRS.