VLSI Design of Power Efficient Reversible LFSR Using Pseudo Reed-Muller Expressions
Rajkumar P Shibinu A. R · 2015
Power dissipation is considered as one of the most important factors while designing a circuit. Reversible logic has become a promising technology in low power design. It is because reversible logic utilizes only very less power, thereby leading to less power dissipation. Conventional circuits which are irreversible in nature are subject to very large amount of minimum power dissipation per signal transition. Reversible logic is considered as a computing paradigm in which there is a one-to-one mapping between the input and the output vectors. In this paper we discuss with reversible circuits and reversibility which in future will be considered as a trend for low power design. Combinational circuits were the primary ones to be implemented using this technique. Later on few researches also contributed toward sequential circuits. In this paper we implement a reversible LFSR that dissipate less power than the conventional LFSR circuitry. Here we use Pseudo Reed-Muller expressions (PSDRM) for the synthesis of the design. There are also other methods of synthesis. But it has been found that PSDRM circuits are more efficient than other techniques such as Positive Polarity Reed-Muller (PPRM) expression and Fixed Polarity Reed-Muller (FPRM) expression based circuits. By using this technique there is more optimization as well as improvement in other factors such as number of gates, memory usage, garbage output, quantum cost etc.