Correction to "The 'unity-lagged' short-time spectrum of a narrow-band Gaussian process" ¡
IEEE Transactions on Acoustics Speech and Signal Processing · 1984
SUMMARY The MFIR concept has been investigated in the context of very high-order FIR’S. It was noted that when the table address space m is small compared to the filter order N, the MFIR concept offered potential speed and complexity reduction benefits. The MFIR also has a very regular architecture. This, combined with the fact the filter is memory intensive, means that .it may be a logical candidate for implementation as a VLSI unit. Here, individual MFIR subsections could be designed as a highly integrated unit consisting of a table, input shift register network; and shift adder. The architecture presented also has a natural systolic decomposition.