Implementation of Area Efficient OFDM Transceiver on FPGA
G. S. Biradar · 2013
orthogonal frequency division multiplexing (OFDM) is a modulation technology which is widely adopted in many new and emerging wired and wireless communication systems. OFDM offers superior advantages of high spectral efficiency, robustness against a inter carrier and inter symbol interference. In this paper we are designing a transceiver of an OFDM and it is implemented on FPGA. In order to reduce the circuit complexity and space, pipelined 128 point FFT /IFFT architecture is used and also aims to optimize in terms of area and speed at low frequency. They consist of thousands of logic gates and some configurable logic blocks which make them appropriate solution for prototyping the application specific integrated circuits(ASIC) with dedicated architectures for specified digital signal processing applications(2). This paper presents the design and implementation of OFDM transceiver on FPGA. The proposed design is simulated using Xilinx and then it is implemented on FPGA. This system utilizes the optimal number of resources in terms of slices, LUTs and multipliers to provide high performance cost effective solutions for wireless communications. In order to reduce the circuit complexity and space a pipelined FFT /IFFT architecture is used and also aims for high through put, high data rate at low frequency. The baseband processing however is mostly carried out by simulations only. In recent years few attempted implementation on FPGA or ASICs. In this paper the code is developed using verilog and simulated using Xilinx and then it is implemented on FPGA.