GENES IV: A Bit-Serial Processing Element for a Multi-Model Neural-Network Accelerator
Paolo Ienne, Marc A. Viredaz · 1996
In Luigi Dadda and Benjamin Wah, editors, Proceedings of the International Conference on Application-Specific Array Processors, pages 345--56, Venezia, October 1993. A systolic array of dedicated processing elements (PEs) is presented as the heart of a multi-model neural-network accelerator. The instruction set of the PEs allows the implementation of several widely-used neural models, including multi-layer Perceptrons with the backpropagation learning rule and Kohonen feature maps. Each PE holds an element of the synaptic weight matrix. An instantaneous swapping mechanism of the weight matrix allows the implementation of neural networks larger than the physical PE array. A systolicallyflowing instruction accompanies each input vector propagating in the array. This avoids the need of emptying and refilling the array when the operating mode of the array is changed. Both the GENES IV chip, containing a matrix of 2 \\Theta 2 PEs, and an auxiliary arithmetic circuit have been manufactured an...