A Parallel-Access Mapping Method for the Data Exchange Buffers Around DCT/IDCT in HEVC Encoders Based on Single-Port SRAMs
Yibo Edward Fan, Leilei Huang, Yufeng Bai, Xiaoyang Zeng · IEEE Transactions on Circuits & Systems II Express Briefs · 2015
In the High Efficiency Video Coding (HEVC) standard, a notation of the transform unit (TU) is introduced with four different sizes, i.e., 4 × 4, 8 × 8, 16 × 16, and 32 × 32, which results in at least two problems in the use of discrete cosine transform/inversed discrete cosine transform (DCT/IDCT). One is changeable input/output format presented by DCT/IDCT when it deals with TUs of different sizes, which intensifies the nonconformity during the data exchange with other modules. The other is the demand for high throughput to traverse the vast possible TU partitions to find the best one, which would be easily dragged by an inefficient data exchange method. To solve this problem, a parallel-access data mapping method based on single-port static random access memory devices (SRAMs) is proposed in this brief. It can be applied to the data exchange buffers around DCT/IDCT in HEVC encoders to fulfill a high-throughput data exchange. Here, parallel access means one row of 1 × 32 pixels, two rows of 1 × 16 pixels, four rows of 1 × 8 pixels, or four rows of 1 × 4 pixels could be accessed in one cycle depending on the specific size of the current TU.