The Raw microprocessor: a computational fabric for software circuits and general-purpose programs
Michael Bedford Taylor, Jeehwan Kim, Joel B. Miller, David Wentzlaff, Fae Ghodrat, Bruce C. N. Greenwald, Henry Hoffman, P. Johnson, Jae-Wook Lee, Wing Lee, Albert Ma, Arvind Saraf, M. Seneski, Nathan Shnidman, Volker Strumpen, Matthew I. Frank, Saman P. Amarasinghe, Anant K. Agarwal · IEEE Micro · 2002
Wire delay is emerging as the natural limiter to microprocessor scalability. A new architectural approach could solve this problem, as well as deliver unprecedented performance, energy efficiency and cost effectiveness. The Raw microprocessor research prototype uses a scalable instruction set architecture to attack the emerging wire-delay problem by providing a parallel, software interface to the gate, wire and pin resources of the chip. An architecture that has direct, first-class analogs to all of these physical resources will ultimately let programmers achieve the maximum amount of performance and energy efficiency in the face of wire delay.