A CMOS analog neuro-chip with stochastic learning and multilevel weight storage

Massimo Conti, G. Guaitini, Claudio Turchetti · 2002

The chip, fabricated in a 1.0 /spl mu/m CMOS technology, has a 2-dimension input vector, 16 neurons, 112 weights, each one with a multilevel storage circuit, 28 internal uncorrelated noise sources, a random weight change learning algorithm implemented on-chip and weight access capability.

Read the paper · More papers on PaperTik