Fan-in tree analysis: a new fault isolation tool
Ng Kang Siong · 2002
With the ever increasing complexity in IC design and with the introduction of flip chip technology, the pressing need for computer aided fault isolation (FI) is sensed. Fan-in tree is a collection of subsequent fan-in signals with respect to a given node. As such, possible failing locations can be narrowed down to nodes that reside within the fan-in tree only. Multiple fan-in trees from multiple known failing nodes can also be intersected to locate common driving nodes. This paper presents an application program that was developed for Intel standard (.sch) netlist format. The result is FTREE; a fan-in tree tool that is independent of product. This tool enhances the performance of other FA tools. For its optimum usage, proper scan node selection is required during design stage. Selection of these nodes is also presented.