Design and hardware implementation of a memory efficient Huffman decoding
Reza Hashemian · IEEE Transactions on Consumer Electronics · 1994
Hardware design of a high speed and memory efficient Huffman decoder, introduced in Hashemian (1993) is presented. The algorithm developed is based on a specific Huffman tree structure using a code-bit clustering scheme. The method is shown to be extremely efficient in the memory requirement, and fast in searching for the desired symbols. For experimental video data with code-words extended up to 13 bits, the entire memory space needed is shown to be 122 words in size, compared with normally 2/sup 13/=8196 words memory space requirement. The design of the decoder is carried out using the Si-gate CMOS process.>