Vector-radix DCT/IDCT implementation for MPEG DSP
M. Norley Liu · 2002
This paper presents a hardware architecture and VHDL implementation of the vector-radix DCT/IDCT algorithm. This architecture is generic for both DCT and IDCT. A high speed 2-D video IDCT and a low cost 1-D audio DCT implementations are discussed to illustrate the exceptional hardware performance particularly for MPEG applications.