Hardware-efficient nonlinear equalizer and its performance
S.K. Nair, Jaekyun J. Moon · 2002
We have previously shown that nonlinear equalizers have performance advantages over conventional linear equalizers in magnetic recording channels. One drawback of the original architecture for the proposed nonlinear equalizers is that it requires more multiplications per symbol interval than linear FIR digital filters. This limits its implementability in digital circuits. A digital nonlinear filter architecture without multipliers is presented. We restrict the connection weights of the nonlinear filters to be powers of two or sums of two powers of two. The equalizers obtained by the second approach is shown to have performance indicators quite close to the original filter with continuous valued connection weights. Experimental and simulation results are presented. Asynchronously sampled data from a spin-stand is used for the experimental part.