Design of a Standard Floating-Point Chip
William W. Troutman, P.W. Diodato, A. K. Goksel, M.-S. Tsay, R.H. Krambeck · IEEE Journal of Solid-State Circuits · 1986
Some aspects of design of a VLSI floating-point chip, which provides the WE/spl registered/32100 microprocessor with math acceleration capabilities, are described. The chip is implemented in 1.75-/spl mu/m twin-tub CMOS II technology [2] and contains 140 000 transistors.