An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration
Radulescu, Andrei, Dielissen, JTMH John, González Pestana, S, Om Prakash Gangwal, Rijpkema, Edwin, Wielage, Paul, Goossens, KGW Kees · 2005
Abstract—In this paper, we present a network interface (NI) for an on-chip network. Our NI decouples computation from communication by offering a shared-memory abstraction, which is independent of the network implementation. We use a transactionbased protocol to achieve backward compatibility with existing bus protocols such as AXI, OCP, and DTL. Our NI has a modular architecture, which allows flexible instantiation. It provides both guaranteed and best-effort services via connections. These are configured via NI ports using the network itself, instead of a separate control interconnect. An example instance of this NI with four ports has an area of 0.25 mmP after layout in 0.13- m technology, and runs at 500 MHz. Index Terms—Best-effort communication, communication protocols, network interfaces, networks on chip, packet switching, performance guarantees. I.