An efficient system to develop various soft IPs
Bae Jong-Hong, Seong-Jun Kyung, Mun-Won Ahn, Seong-Sik Kim, Ji-Soo Lim, Wook-Jin Cha, Jimin Lee, H.M. Kwon, Se-Jin Yoo, Dong-Soo Cho, Jay Chae · 2002
Evolutional enhancement in VLSI technology makes a complicated system integrated in a chip. To design a system with large complexity, well-designed macro block, IP (Intellectual Property), is preferred to reduce design time enormously. A system, named ART (automatic RTL translation), is developed to generate synthesizable RTL IPs from legacy hard macros. With help of the ART system, we developed a soft IP of an 8-bit embedded microcontroller. The operating frequency of the IP is up to 80 MHz with a 0.6 /spl mu/m CMOS technology. An MCU for Digital Tuning System (DTS) was also developed using the IP with the same technology.