On the design of easily testable and reconfigurable systolic arrays
J.H. Kim · 2003
Methods to design easily testable and reconfigurable (ETAR) systolic arrays are proposed, and procedures to design linear unidirectional and bidirectional systolic arrays are given. The main feature of the proposed designs is that the processing elements in liner arrays can all be tested simultaneously, thus reducing the testing time significantly. Another feature is that the throughputs of the reconfigured linear unidirectional as well as bidirectional arrays can equal those of the fault-free linear arrays.>