An accuracy-driven complex arithmetic unit
Lambert Spaanenburg, Rudi van Drunen, A. Pops, A.C.W. Postma, R. Sytsma · 2002
An arithmetic technique is described that allows one to speed up computation of complex operations with 30-70% by adapting the relative precision of the values. Within typical applications a characteristic improvement of upto 60% is retained. A single pipelined 32-bits arithmetic unit is defined, that supports the autonomous handling of accuracy settings while providing a direct hardware implementation for addition/subtraction, multiplication/division, power/root and a number of mixed operations such as sum of squares. In a 0.8 /spl mu/m CMOS technology, this module houses 30 K transistors on a 2.5 mm/sup 2/ area and operates at about 100 MHz external clock.>