Hi-PASS: a computer-aided synthesis system for maximally parallel digital signal processing ASICs
Phillip J. Duncan, S. L. N. Swamy, S. Sprouse, D. Potasz, Rajeev Jain, Neal Gafter, W. Cammack, Y. Wong, Wanda Gass · 1992
Hi-PASS, a CAD system for digital signal processor (DSP) architecture synthesis, has been developed to automatically produce maximally parallel VLSI designs for real-time applications. The target DSP applications are the class for which desired sample rates are so high that time sharing of hardware is not feasible. Hi-PASS accepts a C code description of the design to be synthesized and produces a structural description of the final design which can be fabricated using standard cells provided by the Lager IV silicon assembly system. Hi-PASS is a collection of modular tools, several of which contain new techniques within the field of synthesis. C code is converted into a flowgraph using a technique known as symbolic interpretation, including new methods for handling certain types of input-dependent control flow. The HOPS program is a heuristic search flowgraph optimizer tailored for the arithmetic intensive structures necessary for real-time DSP applications. The high throughput rates necessary for these applications also require that retiming be used to provide very short inter-register delay times. A new retiming tool has been developed which allows for computationally efficient bit-level retiming.>