Architecture of Via Programmable Logic using Exclusive-OR Array (VPEX) for EB Direct Writing
Akihiro Nakamura, Masahide Kawaharazaki, Masaya Yoshikawa, Takeshi Fujino · 2007
In this paper, we propose the novel architecture of VCLD (v̲ia c̲onfigurable l̲ogic d̲evice) called VPEX (v̲ia p̲rogrammable logic using e̲x̲clusive-OR array) which is optimized for electron beam (EB) direct writing. The logic element (LE) of VPEX consists of complex gate type exclusive OR (EXOR) and inverter (NOT) gates. The single LE can output 12 logics which include all 2-inputs logic functions (NAND, NOR AND, OR bubble AND, bubble OR XOR XNOR), 3 inputs AOI21 and inverted-output multiplexer (MUXI) by changing via-1 layout. Scan D-FlipFlop can be composed by using 5 LEs. The logic of each LE can be defined by double EB exposure using "character beam". The speed performance of VPEX is much better than that of FPGAs, and 1.5 times worse than that of ASICs. We believe that the combination of VPEX architecture and EB direct writing is the best solution for low-volume production LSIs.