Design of embedded systems: formal models, validation, and synthesis
Stephen A. Edwards, Luciano Lavagno, Edward A. Lee, Alberto L. Sangiovanni-Vincentelli · Proceedings of the IEEE · 1997
This paper addresses the design of reactive real-time embedded systems. Such systems are often heterogeneous in implementation technologies and design styles, for example by combining hardware application-specific integrated circuits (ASICs) with embedded software. The concurrent design process for such embedded systems involves solving the specification, validation, and synthesis problems. We review the variety of approaches to these problems that have been taken.