Software implementation of LNS arithmetic in an ARM embedded system
Chichyang Chen, Li-Wei Liu, Jun-Wen Jou · 2009
Logarithmic number system (LNS) arithmetic is a good alternative for floating-point arithmetic. We have implemented 32-bit LNS arithmetic by using assembly and C languages on an ARM processor. Compared to FLP arithmetic, the proposed software-implemented LNS arithmetic can achieve a speedup factor of 9.12/13.45 in multiplication/division, with only about 34% speed degrade in addition/subtraction. For the ABfunction, the proposed LNS arithmetic is 91.06 times faster than the FLP arithmetic. We conclude that our proposed software LNS arithmetic implementation approach is very efficient for computing complex arithmetic functions in an ARM embedded system.