Optimization and Implementation of AVS-M Decoder on ARM
Baiying Lei, Wenguang Jin, Huifang Zhang, Kailing Hu · 2007
AVS-M is the recent mobile video coding standard of China. Currently, ARM cores are widely used in mobile applications because of their low power consumption. In this paper, a scheme of the AVS-M decoder realtime implementation on 32 bit MCU RISC processor ARM920T (S3C2440) is presented. The algorithm, redundancy, structure and memory optimization methods to implement AVS-M realtime are discussed in detail. The experiment results demonstrate the success of our optimization techniques and the realtime implementation. The ADS, MCPS and simulation results show that the proposed AVS-M decoder can decode the QVGA image sequence in real-time with high image quality and has low complexity and less memory requirement. AVS conformance test result confirms the proposed AVS-M decoder full compliance with AVS. The proposed AVS-M decoder can be employed in many real-time applications in the third generation communication.