A programmable processor with multiple functional units and banked registers for general purpose numerical processing

T. Morifuji, Yoshinori Takeuchi, M. Imai · 1999

We present an architecture of a general purpose numerical processor (GPNP). The processor with this architecture is capable of running a wide variety of numerical processing and digital signal processing with its programmability. Flexibility and high-performance are achieved by multiple functional units and their data transfer parallelism. The prototype of a GPNP with five functional units can operate with a 33-MHz clock frequency by simulation and its size corresponds with 230-kTr and 34.5-kbytes on-chip memory.

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