A VLSI-based digital multilayer neural network architecture
Y.-C. Kim, Michael A. Shanblatt · 2002
An architecture and a statistical model for a pulse-mode digital multilayer neural network (DMNN) are presented. The model uses simple logic gates as basic computing units. Modular design techniques lead to an extremely compact and flexible network architecture for VLSI implementation. An example network for character recognition and its performance are presented.>