Emulating petaflops machines and blue gene
N. Saboo, Ankit Singla, J.M. Unger, Laxmikant V. Kalé · 2005
PetaFLOPS-class computers, based on the current or foreseeable CMOS generation, appear to be feasible in the near future. An emulator for a petaFLOPS-class program-ming environment is necessary to facilitate offline develop-ment and debugging of applications, and exploration of pro-gramming models. Such an emulator must be able to run on large traditional parallel machines. This paper describes the design and implementation of an emulator for a class of petaFLOPS machines. The machine parameters can be var-ied to cover a variety of possible architectures within this class, although our current implementation is influenced by (and is targeted to emulate) an initial design of the Blue Gene Machine being developed by IBM. Our implementa-tion is based on Charm++, an object-based message-driven parallel execution model, which allows emulation of mul-tiple Blue Gene nodes to a single physical processor. We demonstrate the feasibility of our approach by emulating short million-processor programs on less than a hundred processors of the ASCI-Red machine. 1.