High precision programmable adaptive digital frequency multiplier
M.A. Partida, Adriano de Luca, Jose G. Delgado-Frias, J. Goddard, Romeo Urbieta Parrazales · 2002
This paper presents and justifies the use of an architecture which increases the precision in the output pulse of an adaptive frequency multiplier. This is done without using a correction circuit, a component which was necessary in previous work in the area.