On test set preservation of retimed circuits
Aiman H. El‐Maleh, T.E. Marchok, Janusz Rajski, Wojciech P. Maly · 1995
Abstract| Recently, it has been shown that retiming has a very strong impact on the run time of sequential, structural automatic test pattern generators (ATPGs), as well as the levels of fault coverage and fault eciency attained.In this paper, we show that retiming preserves testability with respect to a single stuck-at fault test set by adding a pre x sequence of a pre-determined number of arbitrary input vectors.Experimental results show that high fault coverages can be achieved on high performance circuits optimized by retiming with a much less CPU time (a reduction of two orders of magnitude in several instances) than if ATPG is attempted directly on those circuits.