SPAR: a schematic place and route system
Stephen T. Frezza, Steven P. Levitan · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1993
An approach to the automatic generation of schematic diagrams from circuit descriptions is presented. The heuristics that make up the system are based on two principles of schematics readability: functional identification and traceability. SPAR's generation process is broken into five distinct phases: partitioning the netlist, placement of components on the page, global routing, local routing, and the addition of I/O modules. All phases of the generation process use a two-dimensional space management technique based on virtual tile spaces. The global router is guided by a cost function consisting of both congestion and wirelength estimates. The local router uses a constraint-propagation technique to optimize the traceability of lines through congested areas. The data structures and algorithms used allow the system to support incremental additions to the schematic without complete regeneration. A technique for evaluating the quality of schematic drawings is described and applied to the present results.>