A comparison of three verification techniques
Mike G. Bartley, Darren Galpin, Tim Blackmore · Proceedings - ACM IEEE Design Automation Conference · 2002
This paper describes the verification of two versions of a bridge between two on-chip buses. The verification was performed just as the Infineon Technologies Design Centre in Bristol was introducing pseudo-random testing (using Specman) and property checking (using GateProp) into their verification flows and thus provides a good opportunity to compare these two techniques with the existing strategy of directed testing using VHDL bus functional models.