GaAs high-speed data transfer network for a parallel processing system
Y. Kitaura, Atushi Kameyama, T. Terada, Naotaka Uchitomi, T. Sudo, A. Maeda · 2002
A GaAs high-speed data transfer network connecting multiple processor units (PUs) has been successfully developed in a module with 8-b slice GaAs bus logic (BL) LSIs, which fully functioned at more than 100 MHz. The GaAs multichip module consists of 12 GaAs BL LSIs in a 3*4 matrix. In the parallel processing system, a 4 Gbit/s data transfer data (32 b*120 MHz) can be realized by four stacked modules of 48 GaAs BLs.>