Decimal signed digit addition using stored transfer encoding
Amir Kaivani, Seok‐Bum Ko · 2013
High speed carry-free adders are very important in computer arithmetic especially in decimal arithmetic where complicated operations such as division and multiplication are the bottleneck. Using redundant number systems to represent intermediate results is an efficient way to speed up decimal arithmetic units. In this paper we improve the fastest previous carry-free signed digit decimal adder, based on the partitioning method, by allotting [-9, 7] as the digit-set to allow for the stored-transfer representation. The evaluation results show that the proposed adder has 15 % speed advantage over the fastest previous work but at the cost of 23 % more area.