Pipelining high-radix SRT division algorithms
Saurabh Upadhyay, James E. Stine · Conference proceedings · 2007
This paper shows various ways to pipeline popular SRT division algorithms. Different logic gate families and circuit structures are used to explore possible overheads introduced in each implementation. Simulation results are compared to find out the fastest possible architecture and comparisons are explored from parasitically extracted AMI C5N 0.5 mum layouts.