A 167-processor 65 nm computational platform with per-processor dynamic supply voltage and dynamic clock frequency scaling
Dean N. Truong, Wayne H. Cheng, Tinoosh Mohsenin, Zhiyi Yu, Toney Jacobson, Gouri Landge, Michael J. Meeuwsen, Christine Watnik, Paul Mejia, Anh Tran, Jeremy W. Webb, Eric W. Work, Zhibin Xiao, Bevan M. Baas · 2008
A 167-processor 65 nm computational platform well suited for DSP, communication, and multimedia workloads contains 164 programmable processors with dynamic supply voltage and dynamic clock frequency circuits, three algorithm-specific processors, and three 16 KB shared memories, all clocked by independent oscillators and connected by configurable long-distance-capable links.