Modeling IP-ATM gateway using M/G/1/N queue
Mahbub Hassan, Ruhul Amin Sarker, Mohammed Atiquzzaman · 2002
Because of the growing investment in both IP and ATM networks, designing efficient IP-ATM gateways for interconnecting these two networks has become very important. One of the main design issues is buffer dimensioning at the gateway for optimum performance. Modeling IP-ATM gateways helps obtaining the optimum design. However, due to very complex nature of an IP-ATM gateway, only models for gateways with infinite buffers have been studied previously. In this paper, an M/G/1/N model for studying the performance of IP-ATM gateway with finite buffers is presented. The performance of the IP-ATM gateway as a function of the buffer size is studied through analysis of the proposed model. The accuracy of the proposed model is verified through simulation.