A scalable GF(2/sup m/)arithmetic unit for application in an ECC processor
William Chelton, Mohammed Benaissa · 2004
This paper proposes a new architecture for an arithmetic unit (AU) for applications that operate over GF(2/sup m/), in particular elliptic curve cryptography. The AU is completely scalable enabling it to operate over any field degree without the need to reconfigure hardware. Operands are considered as a series of w-bit words, where w can be set to meet design requirements. By transferring the complexity of control to software, whilst retaining the generic functions of division and multiplication in hardware, a low area, highly flexible implementation can be attained. A proof-of concept AU was implemented and tested in FPGA. Theoretical results were calculated for scalar multiplication, which were compared to a less scalable implementation. Though the AU cannot achieve the computational speed attained by the other implementation it offers potentially large improvements when considering the area-time product and, therefore, improved efficiency.