A field-programmable high-speed encoder for binary cyclic codes
Erl‐Huei Lu, Hsiao-Peng Wuu, Yi-Chang Cheng, Po‐Chiang Lu · International Journal of Electronics · 1994
A new algorithm is proposed in this paper for encoding an («, k) binary cyclic code using its parity polynomial. Based on this algorithm, a field-programmable highspeed encoder is also presented, capable of being programmed for encoding most of the binary block codes. Programming the new circuit and verifying the programmed result are very convenient in light of the fact that only a DC power supply and a voltage meter would be required. Furthermore, unlike the encoding circuit of Lin and Costello (1983), which was based on the parity polynomial as well, the longest propagation delay of the new encoding circuit is observed as being independent of the k such that it would be highly suitable for codes having large k.