Programmable Gigabit Ethernet Packet Processor Design Methodology
Maged Attia, Ingrid M.R. Verbauwhede · European Conference on Circuit Theory and Design · 2001
The design of domain specific processors that require high performance,low power and high degree of programmability is the bottleneck in many applications. In this paper,a novel design methodology to support the development of such a processor is described. This design methodology will be illustrated with the design of a forwarding engine of a Gigabit Ethernet router. Indeed,this forwarding engine requires a high degree of flexibility to support a large number of protocols,yet at the same time it requires extremely high throughput.